NetTimeLogic GmbH - PTP Products

PTP Products

NetTimeLogic provides several different PTP (IEEE1588) cores, fully compliant with IEEE1588-2019/2008.
All cores are in plain VHDL and completely FPGA vendor independent. The protocols are implemented as full hardware cores, no soft-core CPUs are used.

PTP Ordinary Clock

The PTP Ordinary Clock (OC) from NetTimeLogic is a full hardware only implementation of an OC as defined in IEEE1588-2019/2008. It implements all algorithms directly in hardware, no software or soft-core CPU is needed.

PTP Slave Only Clock

The PTP Slave Only Clock (SO) from NetTimeLogic is a full hardware only implementation of an OC as defined in IEEE1588-2019/2008but with the Slave-Only flag set. Resource optimization is done according to the needs of the Slave-Only clock. It implements all algorithms directly in hardware, no software or soft-core CPU is needed.

PTP Grandmaster Clock

The PTP Grandmaster Clock (GM) from NetTimeLogic is a full hardware only implementation of a GM as defined in IEEE1588-2019/2008. It implements all algorithms directly in hardware, no software or soft-core CPU is needed. The Grandmaster Clock is based on the OC and allows additional synchronization of the clock which shall be distributed. Source for the clock can be any of the other synchronization cores.

PTP Transparent Clock

The PTP Transparent Clock (TC) from NetTimeLogic is a full hardware only implementation of an TC as defined in IEEE1588-2019/2008. The core is built from multiple PTP TC ports. The number of ports can be chosen by the user. These ports can be connected to a switch or individual ports of an user core like a PRP/HSR RedBox or similar.

PTP Hybrid Clock

The PTP Hybrid Clock (HC) from NetTimeLogic is combining a PTP OC core with a three port PTP TC core to a Hybrid Clock. The Hybrid Clock can be connected to a user core like a HSR/PRP RedBox, a Profinet Core or similar.

PTP Timestamp Unit

The PTP Timestamp Unit (TSU) from NetTimeLogic is a single port PTP frame timestamper which allows to run a PTP software stack (PTP4l, PTPd, etc.) on a CPU with hardware timestamping support in the FPGA. It is designed for Systems on Chip (SoC) which are a combination of a CPU and FPGA, but can also run on a FPGA without integrated CPU. It can be used to build a PTP OC or PTP BC (multiple instances).

CSPTP Server

The CSPTP Server from NetTimeLogic is a full hardware only implementation of a high performance Client-Server PTP (CSPTP) Server according to the first draft of IEEE1588.1. It allows to synchronize 910k+ CSPTP Clients without the need of software or a soft-core CPU.

NetTimeLogic is part of the standardization of CSPTP and will constantly adapt to the standard developments.

CSPTP Client

The CSPTP (Client-Server PTP)Client from NetTimeLogic is a full hardware only implementation of a Client-Server PTP (CSPTP) Client according to the first draft of IEEE1588.1. It allows to synchronize the local clock to CSPTP without the need of software or a soft-core CPU.