NetTimeLogic has been founded in 2015 by Sven Meier.
With over 20 years of experience in FPGA development and real-time Ethernet, we are experts in the field of hardware assisted time synchronization and network redundancy. We are specialized in the development of FPGA IP cores of time synchronization and network redundancy protocols, such as PTP, IRIG-B, PPS, RTC and NMEA or HSR and PRP.
NetTimeLogic is part of the IEEE1588 standardization group to always get the latest information in the field of time synchronization and directly integrates them into their cores. Also our time synchronization cores are interoperability tested at the ISPCS.
All cores successfully tested at ISPCS proudly get the "ISPCS proved" logo, all cores tested at the IIC Testbed get the "IIC(R) Testbed proved" logo:
We offer swiss quality engineering - highest quality, always on time! Therefore we are proud to be member of the "swiss made software" consortium:
We are also proud to be a members of the AMD, Altera and Lattice Partner Programs:
On March 24th, 2025 we celebrated our 10th anniversary:
By the way, do you know what time it is? If not click here.
