Thomas Schaub has a bachelor degree in electrical engineering from the FHNW University of Applied Sciences (Switzerland).
Thomas is Business Partner and principal FPGA Design Engineer at NetTimeLogic.
He has in-depth knowledge in time synchronization, ethernet, data processing, FPGA, software and hardware development, as well as testing and project management (SCRUM Master). Over the last years he developed several FPGA IP cores for the utilities and printing industry.
Thomas Schaub is part of the TSN/A committee created several papers/publications/articels/webinars in the field of TSN:
