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Rtc_Master_Flyer.pdf Size : 117.369 Kb Type : pdf |
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Rtc_Master_ReferenceManual.pdf Size : 896.516 Kb Type : pdf |
NetTimeLogic’s RTC Master Clock is a full hardware (FPGA) only implementation of a synchronization core allowing to read and write a I2C Realtime Clock (RTC) like the DS1307 or MCP7941x. Access to the RTC is done from the FPGA without software interaction. It allows storing and recovering time from a non-volatile storage. Reading and Writing is aligned with the Square Wave Output of the RTC. On a read, a nanosecond part is calculated to achieve maximum accuracy. Conversion from/to 32bit second, 32bit nanosecond time format from/to the date format used by the RTC is completely done in HW. This allows running RTC synchronization completely independent and standalone from the user application. The core can be configured either by signals or by an AXI4Light-Slave Register interface.
All calculations and corrections are implemented completely in HW.
* (Picture source Digilent Inc.)
200ns per division on oscilloscope
The synchronization accuracy achieved with a 50MHz oscillator is around +/-100ns
There are different licensing possibilities (more info here). All prices are in US Dollars without VAT, all prices are one-time fees, no royalties apply:
All prices are non-binding estimates – please use the contact form for definitive pricing and lead-time information.
Evaluation binaries available for Digilent's Arty and Terasic's SoCKit development boards or as Modelsim(R) precompiled libraries => contact us for free access
![]() |
Rtc_Master_Flyer.pdf Size : 117.369 Kb Type : pdf |
![]() |
Rtc_Master_ReferenceManual.pdf Size : 896.516 Kb Type : pdf |