Signal Timestamper

The Signal Timestamper from NetTimeLogic is a timestamper with nanosecond resolution (second and nanosecond format). It uses NetTimeLogic's Adjustable Clock core as source for timestamping. Together with the event to timestamp, data can be provided which will then be latched, so that the timestamp and data can be aligned with each other. Timestamps will generate an IRQ and timestamps can optionally be buffered for burst handling.

The IP core comes with a Linux Driver

Block Diagram


  • Signal edge timestamping
  • 32 bit second and 32 bit nanosecond timestamp
  • Optional timestamp buffer for burst handling
  • Configurable polarity
  • Input delay compensation
  • Data snapshot for timestamp alignment
  • Interrupt generation
  • Interrupt masking
  • Edge counter for event detection
  • Maximum event rate depends on CPU and AXI bus load
  • AXI4 Light register set or static configuration
  • Timestamp resolution with 50 MHz system clock: 10ns, with high resolution clock 4ns, with TDC 1 ns
  • Linux driver

Licensing & Pricing

There are different licensing possibilities (more info here). All prices are in US Dollars without VAT, all prices are one-time fees, no royalties apply:

  • Project Source Code: 1100$
  • Site Source Code: 2000$ 

All prices are non-binding estimates – please use the contact form for definitive pricing and lead-time information.


Evaluation binaries available for Digilent's Arty and Terasic's SoCKit development boards or as Modelsim(R) precompiled libraries => contact us for free access

Clk_SignalTimestamper_Flyer.pdf Clk_SignalTimestamper_Flyer.pdf
Size : 118.847 Kb
Type : pdf
Clk_SignalTimestamper_ReferenceManual.pdf Clk_SignalTimestamper_ReferenceManual.pdf
Size : 817.189 Kb
Type : pdf