NetTimeLogic’s Time Of Day (TOD) Master Clock is a full hardware (FPGA) only implementation of a synchronization core able to synchronize a Time of Day sink via NMEA over UART. The whole message creation, algorithms and calculations are implemented in the core, no CPU is required. This allows running TOD synchronization completely independent and standalone from the user application. The core can be configured either by signals or by an AXI4Light-Slave Register interface. This core only uses the second part of the clock, frequency and sub-second offset distribution shall be done in a combination with the PPS Master Clock.
All calculations and corrections are implemented completely in HW.
NMEA message at 1M baud in relation to the PPS
The PPS at the local clock initiates the sending of the NMEA data stream, there is always a fixed relationship between these two signals
- Time of Day Master Clock
- Built-in UART transmitter with configurable baud rate
- NMEA message creator
- Support for NMEA GPZDA and RMC messages for time distribution
- Hardware time conversion from seconds since midnight 1.1.1970 (Linux, TAI, PTP) into Time of Day format (hh:mm:ss dd:mm:yyyy)
- Sending at the local second overflow
- Local time can be set via registers
- In combination with a PPS Master Clock from NetTimeLogic: synchronization accuracy: +/- 25ns
- AXI4 Light register set or static configuration
Licensing & Pricing
There are different licensing possibilities (more info here). All prices are in US Dollars without VAT, all prices are one-time fees, no royalties apply:
- Project Source Code: 3000$
- Site Source Code: 5400$
All prices are non-binding estimates – please use the contact form for definitive pricing and lead-time information.
Evaluation binaries available for Digilent's Arty and Terasic's SoCKit development boards or as Modelsim(R) precompiled libraries => contact us for free access
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