HW, SW and FPGA Design Engineer
Kevin Schärer has a bachelor degree in electrical engineering from the ETH Swiss Federal Institute of Technology Zurich (Switzerland).
Kevin is a Hardware, Software and FPGA Design Engineer at NetTimeLogic.
He has in-depth knowledge in FPGA, software and hardware development. At NetTimeLogic he developed several hardware designs for our AIONYX platform and an FPGA IP core for frequency adjusting oscillators.