We offer tools that can be used to interact or configure our IP cores.
The tools are free of charge and come with the IP
Universal Configuration Manager (UCM)
NetTimeLogic provides a complete configuration solution that allows to configure and manage all IP cores from NetTimeLogic in an FPGA. It uses a serial interface (mostly over USB) to access the registers in the FPGA. In the FPGA it uses NetTimeLogic's configuration IP (free of charge) which represents an AXI Master to the other IP cores. It uses a proprietary protocol to convert the serial data stream from/to AXI register access. The tool needs no configuration and self-discovers all cores available in the design. It allows to access all registers in the design (also third party) which are connected to the AXI bus.