NEWS

Here you can find the latest news about NetTimeLogic's activities.

You can find news also on our social media pages:

Company News

  • 2017-10-03 NetTimeLogic is pround organizer and sponsor of the first swiss PTP Plugfest in Winterthur => read more
  • 2017-09-12 Successful testing of our cores at ISPCS2017, NetTimeLogic introduced the "ISPCS proved" logo for all the cores tested sucessfuly at ISPCS => read more
  • 2017-08-18 PTP Tap beta version released => read more
  • 2017-07-19 HSR/PRP Manual released => read more
  • 2017-06-16 HSR/PRP released => read more
  • 2017-04-01 NetTimeLogic is proud Silver sponsor of ISPCS2017 in Monterey => read more
  • 2017-03-18 NMEA Master released => read more
  • 2017-03-14 NetTimeLogic at Embedded World in Nurnberg
  • 2017-02-10 Pricing of allour products updated
  • 2017-01-06 RTC Master Clock released => read more
  • 2016-12-28 Free Configuration Tool beta release => read more
  • 2016-12-08 NetTimeLogic announces Real Time Clock (RTC) Master core allowing to read and write RTC clocks via I2C without time format conversion. Clock accuracy in the range of +/- 100 ns is achieved. This allows storing and recovering time from a non volatile storage => read more2016-11-09 IRIG-B Master and Slave released => read more
  • 2016-10-28 IRIG-B up and running andsynchronizing accurate to +/-20 ns2016-10-27 NetTimeLogic moved the Headquarter to it's new office
  • 2016-09-04 NetTimeLogic is testing and presenting at the ISPCS2016
  • 2016-08-25 First redundant PTP node ready for beta testing
  • 2016-08-24 NetTimeLogic is partnering with Enclustra GmbH, not only will we share our expertise but also we will use Enclustra's Mars series AX3/PM3 hardware for additional reference designs => read more
  • 2016-08-12 NetFPGA CML was added as a new reference hardware for NetTimeLogics IP cores
  • 2016-08-09 Added Reference Manuals to website for some of the cores
  • 2016-05-06 NetTimeLogic is proud sponsor of ISPCS2016 in Stockholm => read more
  • 2015-04-27 Added network redudndancy cores to NetTimeLogics products => read more
  • 2016-02-28 Website update for multiple cores, adapted pricing, discounts and licensing
  • 2016-01-29 Reference designs for PTP OC/TC/HC/GM and PPS Master/Slave created for Altera's SoCkit and Xilinx Arty development boards, free demo donwloads will follow soon >> read more
  • 2016-01-10 PPS Master and Slave implemented and tested >> read more
  • 2015-10-14 NetTimeLogic succesfully tested OC/TC/HC at ISPCS2015 in Beijing >> read more
  • 2015-10-11 NetTimeLogic attended ISPCS2015 in Beijing
  • 2015-09-11 Flyers of PTP OC, TC and HC added.
  • 2015-09-10 NetTimeLogic will take part in the Industrial Day of the ISPCS >> read more
  • 2015-07-09 NetTimeLogic will take part in the ISPCS Plufest in Beijing to verify PTP cores. >> read more
  • 2015-06-11 NetTimeLogic is part of "Swiss Made Software". >> read more

Twitter NEWS

TumBlr BLOG

<p>We are happy to announce that the swiss PTP Plugfest will take place at the 28th of November at the Zurich University of Applied Sciences (ZHAW) in Winterthur, Switzerland.<br/>
Registration is open to everyone with a IEEE1588/PTP device.</p>

<p>Register now: <a href="http://ptpplugfest.com/register.php">http://ptpplugfest.com/register.php</a></p>

<p>See you there!</p>

We are happy to announce that the swiss PTP Plugfest will take place at the 28th of November at the Zurich University of Applied Sciences (ZHAW) in Winterthur, Switzerland.
Registration is open to everyone with a IEEE1588/PTP device.

Register now: http://ptpplugfest.com/register.php

See you there!

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NetTimeLogic on Tumblr

Just joined tumblr, another platform for news about NetTimeLogic’s development

Posted 109 weeks ago