NetTimeLogic has been founded in 2015 by Sven Meier.
With over 10 years of experience in FPGA development and Realtime Ethernet, we are experts in the field of hardware assisted time sychronization and network redundancy. We are specialized in the development of FPGA IP cores of time sychronization and network redundancy protocols, such as PTP, IRIG-B, PPS, RTC and NMEA or HSR and PRP
NetTimeLogic is part of the IEEE1588 standardization group to always get the latest informationin in the field of time synchronization and directly integrates them into their cores. Also our time synchronization cores are interoperabilty tested at the ISPCS.
We offer swiss quality engineering - highest quality, always on time! Therefore we are proud to be member of the "swiss made software" consortium: