PTP Transparent CLOCK

ISPCS proved

The PTP Transparent Clock (TC) from NetTimeLogic is a fully scalable implementation of a Peer-To-Peer, One-Step Transparent Clock according to IEEE1588. It contains a Peer-Delay message processors which answers and measures the Peer-Delay to its neighbours and an On-The-Fly-Modifier unit which corrects the residenz time of PTP Event-Messages. Each port is individual and only some common counter is shared between the ports. The number of ports can be freely choosen according to the requirements.

All datasets and algorithms are implemented completely in HW.

BLOCK DIAGRAM

PTP Transparent Clock

FEATURES

  • PTP Transparent Clock according to IEEE1588-2008
  • Intercepts path between MAC and PHY
  • Support for n-Ports
  • Support for Default Profile: Layer 2 (Ethernet) and Layer 3 (Ip) support
  • Support for Power Profile: C37.238-2011 including VLAN support
  • Support for Utility Profile: including HSR and PRP tag handling
  • One Step support
  • Peer to Peer (P2P) delay measurement
  • Full line speed
  • AXI4 Light register set or static configuration
  • Datasets according to IEEE1588
  • MII/GMII/RGMII Interface support (optionals AXI4 stream for interconnection to 3rd party cores)
  • Optional Management Message support
  • Timestamp resolution with 50 MHz system clock: 10ns

Licensing & Pricing

There are different licensing possabilities. All prices are in US Dollars without VAT, all prices are one-time fees, no royalities apply:

  • Project Source Code:  6300$
  • Site Source Code: 11400$ 


All prices are non-binding estimates – please use the contact form for definitive pricing and lead-time information.

DOWNLOADS

Evaluation binaries available for Terasic's SoCKit develolopment board or as Modelsim(R) precompiled libraries => contact us for free access

Ptp_TransparentClock_Flyer.pdf Ptp_TransparentClock_Flyer.pdf
Size : 322.879 Kb
Type : pdf
Ptp_TransparentClock_ReferenceManual.pdf Ptp_TransparentClock_ReferenceManual.pdf
Size : 2145.819 Kb
Type : pdf