NMEA Master

NetTimeLogic’s Time Of Day (TOD) Master Clock is a full hardware (FPGA) only implementation of a synchronization core able to synchronize a Time of Day sink via NMEA over UART. The whole message creation, algorithms and calculations are implemented in the core, no CPU is required. This allows running TOD synchronization completely independent and standalone from the user application. The core can be configured either by signals or by an AXI4Light-Slave Register interface.This core only uses the second part of the clock, frequency and sub-second offset distribution shall be done in a combination with the PPS Master Clock.

All calculations and corrections are implemented completely in HW.

BLOCK DIAGRAM

 

Data Stream

 NMEA message at 1M baud in relation to the PPS

The PPS at the local clock initiates the sending of the NMEA data stream, there is always a fixed relationship between these two signals

FEATURES

  • Time of Day Master Clock
  • Built-in UART transmitter with configurable baudrate
  • NMEA message creator
  • Support for NMEA GPZDA messages for time distribution
  • Hardware time conversion from seconds since midnight 1.1.1970 (Linux, TAI, PTP) intoTime of Day format (hh:mm:ss dd:mm:yyyy)
  • Sending at the local second overflow
  • Local time can be set via registers
  • In combination with a PPS Master Clock from NetTimeLogic: synchronization accuracy: +/- 25ns
  • AXI4 Light register set or static configuration

LICENSING & PRICING

 There are different licensing possabilities. All prices are in US Dollars without VAT, all prices are one-time fees, no royalties apply:

  • Project Source Code:  2700$
  • Site Source Code: 4900$

DOWNLOADS

Evaluation binaries available for Digilent's Arty and Terasic's SoCKit develolopment boards or as Modelsim(R) precompiled libraries => contact us for free access

Tod_Master_Flyer.pdf Tod_Master_Flyer.pdf
Size : 262.24 Kb
Type : pdf
Tod_Master_ReferenceManual.pdf Tod_Master_ReferenceManual.pdf
Size : 904.936 Kb
Type : pdf